Normal Computing
Normal Computing offers two core solutions: Normal EDA and Normal ASICs.
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Our verdict
Who it's for
AI-accelerated EDA for faster chip verification and novel AI ASICs
Who should look elsewhere
Requires customer data for post-training of Normal EDA
Pros
- +Accelerates verification for complex chip designs
- +Reduces time-to-market for new hardware by 2x
- +Generates production-grade collateral from specifications
- +Identifies edge cases missed by humans and general-purpose LLMs
- +Ensures traceability between source documents and tests
Cons
- −Requires customer data for post-training of Normal EDA
- −Ambiguity in design specs is handled by inference, which may require human refinement
Key features
- ✓AI-accelerated co-design for silicon engineering
- ✓Structured representations of the chip (Ontology)
- ✓Intelligent verification planning with traceability
- ✓Automated System Verilog stimulus generation
- ✓Simulation and coverage tracking within Normal CLI
- ✓Human-in-the-loop feedback system for verification
- ✓Auto-updates verification collateral for design revisions
- ✓Multimodal AI for interpreting graphical design inputs
Pricing
No public pricing plans recorded.